vkd3d-shader/dxil: TGSM part 2.
Merge request reports
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added 7 commits
- 78449729 - vkd3d-shader/spirv: Do not assert if a TGSM load dst register is not UINT.
- 7c68e3f9 - vkd3d-shader/spirv: Do not assert if a TGSM store data register is not UINT.
- 48d43485 - vkd3d-shader/dxil: Emit an error if a constant code is unhandled.
- 170fd684 - tests/shader-runner: Add TGSM tests.
- 79acc426 - vkd3d-shader/dxil: Implement DX instructions ThreadId, GroupId,...
- bc67fd74 - vkd3d-shader/dxil: Implement the DXIL ATOMICRMW instruction.
- 811ebf33 - vkd3d-shader/spirv: Emit a warning if atomic RMW flags are unhandled.
Toggle commit listadded 6 commits
- debb004c - vkd3d-shader/spirv: Support 64-bit register info component type in spirv_compiler_emit_load_reg().
- a057f63e - vkd3d-shader/dxil: Emit an error if a constant code is unhandled.
- 9a9d49f0 - tests/shader-runner: Add TGSM tests.
- 1790833a - vkd3d-shader/dxil: Implement DX instructions ThreadId, GroupId,...
- cc091f0a - vkd3d-shader/dxil: Implement the DXIL ATOMICRMW instruction.
- dd2e251f - vkd3d-shader/spirv: Emit a warning if atomic RMW flags are unhandled.
Toggle commit listadded 4 commits
Toggle commit listThe same CI failure occurred in
test_tgsm()
when I dropped DXIL code in there, so the SM 6 shader was the issue. The CI runs on a 6600 XT and I have 6750 XT, so results should be the same, except the CI runs an old Mesa version. The failures were most likely caused by mishandling of barriers in the virtualised control flow, resulting in the UAV being written too early, but this is hard to prove.The failures were most likely caused by mishandling of barriers in the virtualised control flow, resulting in the UAV being written too early, but this is hard to prove.
Yeah, that totally makes sense. And indeed I could reproduce the bug on my system using Mesa 22.3.6, but using the same build and cherry picking !711 (merged) the bug is solved. Thinking about it, I even wonder how that works on recent Mesa, the old structurizer messes up with control flow completely. The new one should be much better.
Maybe it makes sense to delay this a little bit to have it go in after !711 (merged), so you don't even have to add
bug_if()
support in the shader runner.Thinking about it, I even wonder how that works on recent Mesa
Bisecting led me to this behemoth: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17922/diffs?commit_id=aeec9071b50c08ce722a9d6418af2c3c0c0af197. I guess I'll keep my curiosity.
CF is a pain for them too it seems
😁 Yeah let's leave it until !711 (merged) is in.
added 74 commits
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cc936791...164608a0 - 66 commits from branch
wine:master
- f96b1889 - vkd3d-shader/spirv: Do not assert if a TGSM load dst register is not UINT.
- a750d1c8 - vkd3d-shader/spirv: Do not assert if a TGSM store data register is not UINT.
- 3fa65636 - vkd3d-shader/spirv: Support 64-bit register info component type in spirv_compiler_emit_load_reg().
- 89c38eb6 - vkd3d-shader/dxil: Emit an error if a constant code is unhandled.
- 76d0456b - tests/shader-runner: Add TGSM tests.
- 59b94b82 - vkd3d-shader/dxil: Implement DX instructions ThreadId, GroupId,...
- 369c56c3 - vkd3d-shader/dxil: Implement the DXIL ATOMICRMW instruction.
- b0a32382 - vkd3d-shader/spirv: Emit a warning if atomic RMW flags are unhandled.
Toggle commit list-
cc936791...164608a0 - 66 commits from branch
- Resolved by Giovanni Mascellani
2582 2608 return true; 2583 2609 } 2584 2610 2611 static bool sm6_value_validate_is_pointer_to_i32(const struct sm6_value *value, struct sm6_parser *sm6) 2612 { 2613 if (!sm6_type_is_pointer(value->type) || !sm6_type_is_i32(value->type->u.pointer.type)) 2614 { 2615 WARN("Operand result type %u is not a pointer to i32.\n", value->type->class); 2616 vkd3d_shader_parser_error(&sm6->p, VKD3D_SHADER_ERROR_DXIL_INVALID_OPERAND, 2617 "An int32 pointer operand passed to a DXIL instruction is not an int32 pointer."); - Resolved by Giovanni Mascellani
- Resolved by Giovanni Mascellani
9248 9248 9249 9249 val_id = spirv_compiler_emit_load_src_with_type(compiler, &src[1], VKD3DSP_WRITEMASK_0, component_type); 9250 9250 9251 if (instruction->flags & VKD3DARF_SEQ_CST) 9252 WARN("Ignoring sequentially consistent ordering.\n"); 9253 if (instruction->flags & VKD3DARF_VOLATILE) 9254 WARN("Ignoring 'volatile' attribute.\n"); - Comment on lines +9251 to +9254
Do you plan to add them shortly? Sequential consistency should be pretty easy, you just have to add the appropriate flag.
Volatile seems a bit more complicated: it requires the Vulkan memory model, which in turn is incompatible with sequential consistency. So I don't know what's the solution for this. I wonder whether volatile accesses are used often in practice.
added 4 commits
- 962c7103 - vkd3d-shader/dxil: Implement DX instructions ThreadId, GroupId,...
- 396a7803 - vkd3d-shader/dxil: Implement the DXIL ATOMICRMW instruction.
- 42d838ba - vkd3d-shader/spirv: Emit a warning if the atomic instruction volatile flag is unhandled.
- 3da1dbcb - vkd3d-shader/spirv: Handle the sequentially consistent ordering flag for atomic instructions.
Toggle commit listadded 13 commits
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3da1dbcb...166dc24b - 4 commits from branch
wine:master
- 4e4829db - vkd3d-shader/spirv: Do not assert if a TGSM load dst register is not UINT.
- d6666690 - vkd3d-shader/spirv: Do not assert if a TGSM store data register is not UINT.
- b8dab5c5 - vkd3d-shader/spirv: Support 64-bit register info component type in spirv_compiler_emit_load_reg().
- dbea370c - vkd3d-shader/dxil: Emit an error if a constant code is unhandled.
- c9201bf4 - tests/shader-runner: Add TGSM tests.
- 845a339c - vkd3d-shader/dxil: Implement DX instructions ThreadId, GroupId,...
- 2e4b1724 - vkd3d-shader/dxil: Implement the DXIL ATOMICRMW instruction.
- 76f631f8 - vkd3d-shader/spirv: Emit a warning if the atomic instruction volatile flag is unhandled.
- cc3fa434 - vkd3d-shader/spirv: Handle the sequentially consistent ordering flag for atomic instructions.
Toggle commit list-
3da1dbcb...166dc24b - 4 commits from branch
added 4 commits
- b8c66836 - vkd3d-shader/dxil: Implement DX instructions ThreadId, GroupId,...
- 2fdc7695 - vkd3d-shader/dxil: Implement the DXIL ATOMICRMW instruction.
- 1d3cb737 - vkd3d-shader/spirv: Emit a warning if the atomic instruction volatile flag is unhandled.
- 8c2df5b2 - vkd3d-shader/spirv: Handle the sequentially consistent ordering flag for atomic instructions.
Toggle commit list