- Jan 22, 2024
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vkd3d-shader/spirv: Do not assert VKD3D_DATA_UINT in spirv_compiler_emit_ld_raw_structured_srv_uav().
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- Jan 18, 2024
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So registers are allocated after normalisation (which could require additional registers).
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- Jan 17, 2024
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The relative-addressed case in shader_register_normalise_arrayed_addressing() leaves the control point id in idx[0], while for constant register indices it is placed in idx[1]. The latter case could be fixed instead, but placing the control point count in the outer dimension is more logical.
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Ensures they are loaded only once per function independent of the control flow graph.
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- Jan 15, 2024
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- Jan 11, 2024
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- Jan 08, 2024
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Bit field instructions in SPIR-V do not specify what happens when offset + count exceeds the type bit width. After this commit we refine the emitted code's behavior to match TPF. This fixes a few failures on MoltenVK.
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- Jan 04, 2024
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- Jan 03, 2024
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vkd3d-shader/ir: Rename the "immconst_uint64" field of struct vkd3d_shader_register to "immconst_u64".
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vkd3d-shader/ir: Rename the "immconst_uint" field of struct vkd3d_shader_register to "immconst_u32". For consistency with the rest of vkd3d-shader; e.g. put_u32() and read_u32().
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- Jan 02, 2024
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As per VUID-StandaloneSpirv-Flat-04744. Not strictly a regression, but revealed by 66cb2815 because it declares unused inputs.
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These instructions perform integer casts to/from 64 bits.
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- Dec 14, 2023
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- Dec 13, 2023
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