- Feb 17, 2025
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Conor McCarthy authored
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Conor McCarthy authored
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Conor McCarthy authored
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Conor McCarthy authored
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Conor McCarthy authored
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Conor McCarthy authored
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Conor McCarthy authored
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Conor McCarthy authored
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Conor McCarthy authored
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Conor McCarthy authored
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Conor McCarthy authored
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Conor McCarthy authored
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- Feb 14, 2025
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Conor McCarthy authored
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Conor McCarthy authored
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Conor McCarthy authored
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Conor McCarthy authored
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Conor McCarthy authored
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Conor McCarthy authored
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Conor McCarthy authored
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Conor McCarthy authored
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Conor McCarthy authored
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Conor McCarthy authored
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Conor McCarthy authored
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Conor McCarthy authored
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Conor McCarthy authored
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Conor McCarthy authored
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Conor McCarthy authored
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Conor McCarthy authored
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Conor McCarthy authored
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Conor McCarthy authored
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Conor McCarthy authored
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Conor McCarthy authored
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Conor McCarthy authored
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Conor McCarthy authored
The flag is currently ignored in the backend, but the disassembler prints it.
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Conor McCarthy authored
vkd3d-shader/ir: Handle 16-bit minimum-precision TGSM declarations in an IR pass instead of in the backend.
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Conor McCarthy authored
vkd3d-shader/ir: Handle 16-bit minimum-precision indexable temp declarations in an IR pass instead of in the backend.
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Conor McCarthy authored
vkd3d-shader/ir: Handle 16-bit minimum-precision immediate constant buffers in an IR pass instead of in the backend.
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Conor McCarthy authored
Where the VSIR validator expects types to be of equal width, emitting 16-bit registers to represent minimum-precision registers can result in validation failure due to mixed widths. It is simpler to handle these before validation than to make the validator check the validity of mixed widths, and this also simplifies the implementation of native 16-bit support in backends. The SPIR-V backend currently ignores minimum-precision flags, so setting them has no effect.
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Conor McCarthy authored
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Conor McCarthy authored
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