Skip to content
GitLab
Explore
Sign in
Register
Primary navigation
Search or go to…
Project
wine
Manage
Activity
Members
Labels
Code
Merge requests
Repository
Branches
Commits
Tags
Repository graph
Compare revisions
Snippets
Build
Pipelines
Jobs
Pipeline schedules
Artifacts
Deploy
Package registry
Container registry
Model registry
Operate
Terraform modules
Analyze
Value stream analytics
Contributor analytics
CI/CD analytics
Repository analytics
Model experiments
Help
Help
Support
GitLab documentation
Compare GitLab plans
Community forum
Contribute to GitLab
Provide feedback
Keyboard shortcuts
?
Snippets
Groups
Projects
Show more breadcrumbs
Lorenzo Ferrillo
wine
Commits
2ed88d7a
Commit
2ed88d7a
authored
13 years ago
by
eric pouech
Committed by
Alexandre Julliard
13 years ago
Browse files
Options
Downloads
Patches
Plain Diff
dbghelp: On x86-64 CPUs, add capability to interpret properly the epilog part.
parent
e40430cd
Branches
Branches containing commit
Tags
Tags containing commit
No related merge requests found
Changes
1
Hide whitespace changes
Inline
Side-by-side
Showing
1 changed file
dlls/dbghelp/cpu_x86_64.c
+77
-2
77 additions, 2 deletions
dlls/dbghelp/cpu_x86_64.c
with
77 additions
and
2 deletions
dlls/dbghelp/cpu_x86_64.c
+
77
−
2
View file @
2ed88d7a
...
...
@@ -349,6 +349,82 @@ static BOOL is_inside_epilog(struct cpu_stack_walk* csw, DWORD64 pc)
}
}
static
BOOL
interpret_epilog
(
struct
cpu_stack_walk
*
csw
,
ULONG64
pc
,
CONTEXT
*
context
)
{
BYTE
insn
,
val8
;
WORD
val16
;
LONG
val32
;
DWORD64
val64
;
for
(;;)
{
BYTE
rex
=
0
;
if
(
!
sw_read_mem
(
csw
,
pc
,
&
insn
,
1
))
return
FALSE
;
if
((
insn
&
0xf0
)
==
0x40
)
{
rex
=
insn
&
0x0f
;
/* rex prefix */
if
(
!
sw_read_mem
(
csw
,
++
pc
,
&
insn
,
1
))
return
FALSE
;
}
switch
(
insn
)
{
case
0x58
:
/* pop %rax/r8 */
case
0x59
:
/* pop %rcx/r9 */
case
0x5a
:
/* pop %rdx/r10 */
case
0x5b
:
/* pop %rbx/r11 */
case
0x5c
:
/* pop %rsp/r12 */
case
0x5d
:
/* pop %rbp/r13 */
case
0x5e
:
/* pop %rsi/r14 */
case
0x5f
:
/* pop %rdi/r15 */
if
(
!
sw_read_mem
(
csw
,
context
->
Rsp
,
&
val64
,
sizeof
(
DWORD64
)))
return
FALSE
;
set_int_reg
(
context
,
insn
-
0x58
+
(
rex
&
1
)
*
8
,
val64
);
context
->
Rsp
+=
sizeof
(
ULONG64
);
pc
++
;
continue
;
case
0x81
:
/* add $nnnn,%rsp */
if
(
!
sw_read_mem
(
csw
,
pc
+
2
,
&
val32
,
sizeof
(
ULONG
)))
return
FALSE
;
context
->
Rsp
+=
(
LONG
)
val32
;
pc
+=
2
+
sizeof
(
LONG
);
continue
;
case
0x83
:
/* add $n,%rsp */
if
(
!
sw_read_mem
(
csw
,
pc
+
2
,
&
val8
,
sizeof
(
BYTE
)))
return
FALSE
;
context
->
Rsp
+=
(
signed
char
)
val8
;
pc
+=
3
;
continue
;
case
0x8d
:
if
(
!
sw_read_mem
(
csw
,
pc
+
1
,
&
insn
,
sizeof
(
BYTE
)))
return
FALSE
;
if
((
insn
>>
6
)
==
1
)
/* lea n(reg),%rsp */
{
if
(
!
sw_read_mem
(
csw
,
pc
+
2
,
&
val8
,
sizeof
(
BYTE
)))
return
FALSE
;
context
->
Rsp
=
get_int_reg
(
context
,
(
insn
&
7
)
+
(
rex
&
1
)
*
8
)
+
(
signed
char
)
val8
;
pc
+=
3
;
}
else
/* lea nnnn(reg),%rsp */
{
if
(
!
sw_read_mem
(
csw
,
pc
+
2
,
&
val32
,
sizeof
(
ULONG
)))
return
FALSE
;
context
->
Rsp
=
get_int_reg
(
context
,
(
insn
&
7
)
+
(
rex
&
1
)
*
8
)
+
(
LONG
)
val32
;
pc
+=
2
+
sizeof
(
LONG
);
}
continue
;
case
0xc2
:
/* ret $nn */
if
(
!
sw_read_mem
(
csw
,
context
->
Rsp
,
&
val64
,
sizeof
(
DWORD64
)))
return
FALSE
;
if
(
!
sw_read_mem
(
csw
,
pc
+
1
,
&
val16
,
sizeof
(
WORD
)))
return
FALSE
;
context
->
Rip
=
val64
;
context
->
Rsp
+=
sizeof
(
ULONG64
)
+
val16
;
return
TRUE
;
case
0xc3
:
/* ret */
if
(
!
sw_read_mem
(
csw
,
context
->
Rsp
,
&
val64
,
sizeof
(
DWORD64
)))
return
FALSE
;
context
->
Rip
=
val64
;
context
->
Rsp
+=
sizeof
(
ULONG64
);
return
TRUE
;
/* FIXME: add various jump instructions */
}
FIXME
(
"unsupported insn %x
\n
"
,
insn
);
return
FALSE
;
}
}
static
BOOL
default_unwind
(
struct
cpu_stack_walk
*
csw
,
CONTEXT
*
context
)
{
if
(
!
sw_read_mem
(
csw
,
context
->
Rsp
,
&
context
->
Rip
,
sizeof
(
DWORD64
)))
...
...
@@ -404,8 +480,7 @@ static BOOL interpret_function_table_entry(struct cpu_stack_walk* csw,
prolog_offset
=
~
0
;
if
(
is_inside_epilog
(
csw
,
context
->
Rip
))
{
FIXME
(
"epilog management not fully done
\n
"
);
/* interpret_epilog((const BYTE*)frame->AddrPC.Offset, context); */
interpret_epilog
(
csw
,
context
->
Rip
,
context
);
return
TRUE
;
}
}
...
...
This diff is collapsed.
Click to expand it.
Preview
0%
Loading
Try again
or
attach a new file
.
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Save comment
Cancel
Please
register
or
sign in
to comment